The 68HC12 ( or HC12 for short) is a microcontroller family from Freescale Semiconductor. Originally introduced in the mids, the architecture is an. Has several new addressing modes added. • Accesses additional memories externally. Here is an overview of the HCS12 CPU architecture. The HCS12 CPU is. COM/SEMICONDUCTORS. HCS Microcontrollers. S12CPUV2/D. Rev. 0 In the M68HC12 and HCS12 architecture, all memory and input/output. (I/O) are.

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The instruction summary tells you the possible addressing modes for any instruction. This column shows the numbers in hex that represent each instruction. The data itself is supplied as the operand. It is an ideal source for those wanting to move away from 68HC11 to a more powerful chip.

Freescale 68HC12 – Wikipedia

The following are all equivalent: Book ratings by Goodreads. Direct Addressing and Extended Addressing. Registration Forgot your password? To add these two numbers, we need to put one of them in an accumulator.

Chapter 7 Low-Level Programming Languages.

System block diagram A8 version. We can notify you when this item is back in stock. For example, instead of specifying the number to be loaded right in the instruction itself, maybe we want to load the number from a particular memory location into ACCA. In this notation, the leftmost bit is the sign bit.


Table of contents Introduction to Computing Chapter 1: Write an instruction sequence to create a ms time delay for a demo board with a MHz bus clock Solution: Registration Forgot your password? My presentations Profile Feedback Log out. History and Features Chapter 2: We use cookies to give you the best possible experience.

Therefore, ncs12 need to copy the memory content into an accumulator, add 3 to it, and then store the sum back to the same memory location.

But this address is two bytes long, so we can reach any memory location. CCR always holds three mask bits and five status flags. The HCS12 uses a bit address bus.

EET Unit 2. HCS12 Architecture

Relative — Offset relative to the instruction itself specifies a branch target address. Therefore, within the range of possible addresses, only some can be used by your programs. Inherent — not really an addressing mode, there is no memory address specified.

Write an instruction sequence to create a delay of 10 sec. Extended — bit absolute address hcz12 the instruction.

HCS12 Microcontrollers and Embedded Systems

Source Form Operation Addr. Select a sequence of instructions that takes a certain amount of time to execute. Ramadan Al-Azhar University Lecture 3. And each location holds some contents, which is one byte. If you wish to download it, please recommend it to your friends in any social system.


EET 2261 Unit 2 HCS12 Architecture

Machine Coding Computers use numbers to represent all kinds of information, architectire the instructions in a program. Control Unit Basic Architecture. One contains only data while the other is containing only program code. These operands are the data usually numbers to be operated on. Do conditionCode practice sheet for H, Z, C bits. Do conditionCode practice sheet for N, V bits. LDAB loads an 8-bit number into B. Computer Hardware Organization What is a Computer?

Introduction to Assembly Language. Looking for beautiful books? Homework 2 and Lab 2 due next week.

If you wish to download it, please recommend it to your friends in any social system. This happens when either: All instructions must have an op code.